What You'll Do
It used to be that high-speed packet forwarding was performed in dedicated
ASIC designs. These days we are looking to make those ASICs more general and
programmable. Cisco Common ASIC Group is looking for a ASIC Verification
Engineer to drive existing projects and engage in new development of our next
generation switching systems.
As part of the ASIC team, you will be developing the ASICs at the heart of
each of these switch products. There are only a very few teams worldwide that
implement such devices. Every time you access the Internet, chances are, your
data's been through one of our switches.

Who You'll Work With
You will work with Cisco 's best-in-class switching solution team. Our team is
responsible for driving integration of the Nexus systems and ACI with
software, including OpenStack, Docker, and Open vSwitch, to help our customers
build multitenant clouds.

Who You Are
You are a talented, motivated ASIC verification engineer to join the team and
contribute to the verification of very complex ASICs. You will have a Design
Verification background, hands-on experience in System Verilog and UVM
methodology, with in-depth knowledge of C++, scripting, as well as ASIC design
and verification flow.
You 'll be part of Cisco Common ASIC Group, focusing on developing and
upgrading various test benches and contributing to different aspects of
verification infrastructure.
You will collaborate closely with the design team and the hardware team to
verify the ASIC in simulation, in emulation and during ASIC bring up.

Responsibilities Include:
* Maintaining existing UVM test benches for block level verification
* Upgrading test benches to accommodate new features
* Developing sequences and tests in UVM as per the testplan
* Upgrading/updating configuration/reset sequences (APIs)
* Writing tests, and debugging regressions
* Be a part of emulation testing efforts

Education and Experience Required:
* University Graduate with Bachelor 's degree in EE (Electrical & Electronics) or CE (Computer Engineering)
* Relevant experience with System Verilog based verification
Knowledge and Skills:
* Basic understanding of System Verilog
* Ability to understand hardware design specification document for a block or feature and capture the necessary tests to verify it full.
* Ability to debug issues independently
* Knowledge of UVM based verification methodology is a plus
* Basic scripting experience (Python, Perl, shell programming)
* Nice to have C, C++ programming and debugging skills
* Good written and verbal communication skills
* Collaborative and team-focused, with the drive to learn and grow
We Are Cisco

WeAreCisco, where each person is unique, but we bring our talents to work as

a team and make a difference powering an inclusive future for all.
We embrace digital, and help our customers implement change in their digital
businesses. Some may think we 're "old" (‎36 years strong) and only about
hardware, but we're also a software company. And a security company. We even
invented an intuitive network that adapts, predicts, learns, and protects. No
other company can do what we do - you can't put us in a box!
But "Digital Transformation" is an empty buzz phrase without a culture that
allows for innovation, creativity, and yes, even failure (if you learn from
it.)
Day to day, we focus on the give and take. We give our best, give our egos a
break, and give of ourselves (because giving back is built into our DNA.) We
take accountability, bold steps, and take difference to heart. Because without
diversity of thought and a dedication to equality for all, there is no moving
forward.
So, you have colorful hair? Don't care. Tattoos? Show off your ink. Like polka
dots? That's cool. Pop culture geek? Many of us are. Passion for technology
and world changing? Be you, with us!

Message to applicants applying to work in the U.S.:
When available, the salary range posted for this position reflects the
projected hiring range for new hire salaries in U.S. locations. For non-sales
roles, the hiring ranges reflect base salary and do not include bonuses,
equity, or benefits. Hiring ranges for sales positions include base and
incentive target, and do not include equity or benefits. Individual pay is
determined by the candidate's hiring location and additional factors,
including but not limited to skillset, experience, and relevant education,
certifications or training. Applicants may not be eligible for the full salary
range based on their U.S. hiring location. The recruiter can share more
details about compensation for the role in your location during the hiring
process.